Vision VHD-800 Especificações descarregar pdf (Página 7)

• Open it using the less program

sh > less crc4.v

The netlist contains a number of logic gates from the standard cell library, interconnected with some wires. Amongst

other cells, Table 1 lists those standard cells.

Table 1: Some gates of the standard cell library.

Standard Cell Description

ND2 2-Input NAND

DFQR D Flip-Flop

MUX2 2-Bit Multiplexer

XNR2 2-Input Exclusive Nor

CKXOR2 2-Input Exclusive Or

Take paper and pencil and draw the schematic of the circuit by investigating the Verilog netlist (Table 1 may help you

in order to classify the gates of the netlist.). You do not need to draw the clock and the reset signal to every ﬂip-ﬂop,

because these signals are taken for granted.

Show the schematic to an assistant.

The less program only provides read-access to a ﬁle, and therefore guarantees that you do not make any unwanted changes to

the netlist.

The SYNOPSYS DESIGN COMPILER GUI is able to create schematics as well as symbols for a certain circuit on its own.

Hence, you can now check whether your previously drawn schematic is correct or not.

Switch back to the Design Vision GUI and select the crc4 design in the Hierarchy Browser. Next, click on the Create \

Schematic of Selected Objects icon (cf. Figure 4) and you will get a new view of the design with the three inputs

and the output

In order to see the schematic, double click on the desgin in the schematic view. Does it match your own schematic?

You may have already recognized that each time you perform an operation within the SYNOPSYS DESIGN COMPILER GUI,

its command gets echoed in the Design Vision Console. During this example we only showed you how to use the GUI of the

SYNOPSYS DESIGN COMPILER. Nevertheless, all the commands can solely be entered in the Design Vision Console and

furthermore in the DC Shell as well. Because synthesis commands will repeat themselves quite often, it is good practice

to collect them in a script and later on you can start that script either by selecting File→Execute Script... (from the

Design Vision GUI) or by running the whole script (from the Design Vision Console or the DC Shell) by entering:

source ./scripts/synth.tcl

Currently, you have two different GUI windows of the SYNOPSYS DESIGN COMPILER opened. If you close the Design Vision

GUI by pressing the “x” at the top-right-hand corner, the DC Shell will stay opened. In order to close both windows, you

either have to navigate to File→Exit, or you enter exit into the DC Shell. Close the SYNOPSYS DESIGN COMPILER by

entering exit into the DC Shell.

Note that you can also observe the width of each I/O.

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